iluvatar-tiangai-100-bi-v100
Source details
Source revision: 8962e1cd5d318439a2e341100fe20f27e7032bf226468e16c2e4a3e964c35653
Iluvatar CoreX · Data center · Accelerator card
Exact Tiangai 100 BI-V100 reference specifications and AI deployment guidance, separated from FusionPointAI commercial inventory.
Technical diagrams
| Field | Value |
|---|---|
| Manufacturer | Iluvatar CoreX |
| Exact SKU | Tiangai 100 BI-V100 |
| Product family | Iluvatar CoreX Tiangai 100 BI-V100 |
| Architecture | Iluvatar CoreX · First generation · GPGPU |
| Generation | Tiangai Training |
| Entity type | Accelerator card |
| Lifecycle | Recent generation |
| Launch date | Not listed |
| VRAM | 32 GB |
| Memory technology | HBM2 |
| Memory bandwidth | Not listed |
| Power | 250 W |
| Interface | PCIe Gen4 x16 |
| Form factor | Full height · Full length · Dual slot · PCIe · Accelerator |
| Interconnect | 64 GB/s host and peer links |
| MIG / partitioning | Not supported |
| Supported numeric formats | Not listed |
| Software stack | iluvatar-corex-software-stack, deepspark |
Best suited to smaller checkpoints, compressed models or distributed configurations sized by the recommendation engine.
Designed for sustained accelerator workloads; training suitability depends on interconnect, precision and cluster topology.
Confirm framework and precision support before deployment.
250 W published power requires chassis, airflow and power delivery for this exact form factor.
64 GB/s host and peer links is the recorded interconnect path; topology must still be validated at node level.
iluvatar-corex-software-stack, deepspark
Source revision: 8962e1cd5d318439a2e341100fe20f27e7032bf226468e16c2e4a3e964c35653
This is not a product photograph.
https://www.iluvatar.com/productDetails?fullCode=cpjs-yj-xlxl-tg100
Last verified: 2026-08-27