nvidia-vera-rubin-superchip
Source details
Source revision: c064455aab408848f45509dc88a60542a4b71eaf81ed8405a04768c6670cfef4
NVIDIA · Platform · Superchip
Exact Vera Rubin Superchip reference specifications and AI deployment guidance, separated from FusionPointAI commercial inventory.
Technical diagrams
| Field | Value |
|---|---|
| Manufacturer | NVIDIA |
| Exact SKU | Vera Rubin Superchip |
| Product family | NVIDIA Vera Rubin Superchip |
| Architecture | Rubin |
| Generation | Rubin |
| Entity type | Superchip |
| Lifecycle | Current |
| Launch date | Not listed |
| VRAM | 576 GB |
| Memory technology | HBM4 |
| Memory bandwidth | 44,000 GB/s |
| Power | Not listed |
| Interface | NVLink-C2C |
| Form factor | CPU-GPU · Superchip |
| Interconnect | NVLink 6 |
| MIG / partitioning | Not supported |
| Supported numeric formats | FP64, FP32, TF32, BF16, FP16, FP8, FP6, FP4, INT8 |
| Software stack | cuda |
High memory capacity supports large checkpoints and multi-GPU inference when runtime and topology are certified.
Suitable for limited fine-tuning and development when software support, cooling and memory capacity are verified.
FP16 acceleration supports common generative and vector workloads within the listed VRAM envelope.
The manufacturer does not publish a directly comparable board-power value for this entity.
NVLink 6 is the recorded interconnect path; topology must still be validated at node level.
cuda
Source revision: c064455aab408848f45509dc88a60542a4b71eaf81ed8405a04768c6670cfef4
This is not a product photograph.
https://www.nvidia.com/en-us/data-center/vera-rubin-nvl72/
Last verified: 2026-08-24