moore-threads-mtt-s5000
Source details
Source revision: e00fc48e3a67e3c479e203b3a8fc45ed825dbdc292dcb70db736cdcfb94eb861
Moore Threads · Data center · Accelerator card
Exact MTT S5000 reference specifications and AI deployment guidance, separated from FusionPointAI commercial inventory.
Product images
| Field | Value |
|---|---|
| Manufacturer | Moore Threads |
| Exact SKU | MTT S5000 |
| Product family | Moore Threads MTT S5000 |
| Architecture | PingHu PH100 |
| Generation | MTT S-Series Data Center |
| Entity type | Accelerator card |
| Lifecycle | Current |
| Launch date | Not listed |
| VRAM | 80 GB |
| Memory technology | HBM2e |
| Memory bandwidth | 1,600 GB/s |
| Power | Not listed |
| Interface | PCIe Gen5 x16 |
| Form factor | Full height · Full length · Dual slot · PCIe · Accelerator |
| Interconnect | MTLink |
| MIG / partitioning | Not supported |
| Supported numeric formats | FP64, FP32, TF32, BF16, FP16, FP8, INT8 |
| Software stack | musa, pytorch, vllm, sglang |
High memory capacity supports large checkpoints and multi-GPU inference when runtime and topology are certified.
Designed for sustained accelerator workloads; training suitability depends on interconnect, precision and cluster topology.
FP16 acceleration supports common generative and vector workloads within the listed VRAM envelope.
The manufacturer does not publish a directly comparable board-power value for this entity.
MTLink is the recorded interconnect path; topology must still be validated at node level.
musa, pytorch, vllm, sglang
Source revision: e00fc48e3a67e3c479e203b3a8fc45ed825dbdc292dcb70db736cdcfb94eb861
This is not a product photograph.
https://en.mthreads.com/product/S5000
Last verified: 2026-08-24